1. Technical Field
A word line driving circuit is disclosed in which sub-word lines are prevented from floating by using a sub-word line driver having two transistors.
2. Discussion of Related Art
FIG. 1 is a circuit diagram showing a conventional word line driver. The word line driver includes a main word line driver 110, and eight sub-word line drivers 120 to 190. The eight sub-word line drivers 120 to 190 are controlled by one main word line MWL0.
Referring to FIG. 1, the main word line driver 110 includes a PMOS transistor P1 and a NMOS transistor N1. The PMOS transistor P1 has one end connected to a high voltage VPP, and the other end connected to the main word line MWL0. The PMOS transistor P1 has a gate applied with signal DR, and thus operates. The NMOS transistor N1 has one end connected to a ground voltage, the other end connected to the main word line MWL0, and operates according to the driving signal DR.
Each of the eight sub-word line drivers 120 to 190 includes a PMOS transistor P2 and two NMOS transistors N2, N3. The PMOS transistor P2 has one end connected to a sub-word line driving voltage FX0, the other end connected to a sub-word line SWL0, and a gate connected to the main word line MWL0. The NMOS transistor N2 has one end connected to a ground voltage, the other end connected to the sub-word line SWL0, and a gate connected to the main word line MWL0. The NMOS transistor N3 has one end connected to the ground voltage, the other end connected to the sub-word line SWL0, and a gate connected to a sub-word line driving voltage FX0B. The NMOS transistor N3 is provided to prevent the sub-word line SWL0 from floating.
As such, if the eight sub-word line drivers 120 to 190 are connected to one main word line, since each of the sub-word line drivers 120 to 190 consists of three transistors. Therefore, the lines of 16 sub-word line driving voltages FX, FXB are required which results in a layout size of the sub-word line driver that is bulky.